vishay siliconix DG2517/dg2518 document number: 74333 s-61774-rev. a, 11-sep-06 www.vishay.com 1 3 , high bandwidth, dual spdt analog switch features ? 1.8 to 5.5 v single supply operation ? low ron: 3 at 4.2 v ? 157 mhz, - 3 db bandwidth ? low off-isolation, - 47 db at 10 mhz ? + 1.6 v logic compatible benefits ? high linearity ? low power consumption ? high bandwidth ? full rail signal swing range applications ? usb/uart signal switching ? audio/video switching ? cellular phone ? media players ? modems ? hard drives ? pcmcia description the DG2517/dg2518 are low-voltage dual single-pole/dou- ble-throw monolithic cmos analog switches. designed to operate from 1.8 v to 5.5 v power supply, the DG2517/ dg2518 achieves a bandwidth of 157 mhz while providing low on-resistance (3 ), excellent on-re sistance matching (0.2 ) and flatness (1 ) over the entire signal range. the DG2517/dg2518 offers the advantage of high linearity that reduces signal distortion, making ideal for audio, video, and usb signal routing applications. additionally, the DG2517/dg2518 are 1.6 v logic compatible within the full operation voltage range. built on vishay siliconix?s pr oprietary sub-micron high-den- sity process, the DG2517/dg2518 brings low power con- sumption at the same time as reduces pcb spacing with the msop10 and dfn10 packages. as a committed partner to the community and the environ- ment, vishay siliconix manufactures this product with the lead (pb)-free device terminations. the dfn package has a nickel-palladium-gold device termination and is represented by the lead (pb)-free "-e4" suffix. the msop package uses 100 % matte tin device termination and is represented by the lead (pb)- free "-e3" suffix. both the matte tin and nickel- palladium-gold device terminations meet all jedec stan- dards for reflow and msl ratings. functional block diagram and pin configuration com1 nc1 v+ 1 2 3 10 9 top view in1 no1 gnd 8 DG2517 nc2 com2 4 5 7 no2 in2 6 com1 no1 v+ 1 2 3 10 9 top view in1 nc1 gnd 8 dg251 8 no2 com2 4 5 7 nc2 in2 6 truth table logic nc1 and nc2 no1 and no2 0onoff 1offon ordering information temp range package part number - 40 to 85 c msop-10 DG2517dq-t1-e3 dg2518dq-t1-e3 dfn-10 DG2517dn-t1-e4 dg2518dn-t1-e4 rohs compliant
www.vishay.com 2 document number: 74333 s-61774-rev. a, 11-sep-06 vishay siliconix DG2517/dg2518 notes: a. signals on nc, no, or com or in exceeding v+ will be clamped by inte rnal diodes. limit forward diode current to maximum curr ent ratings. b. all leads welded or soldered to pc board. c. derate 4.0 mw/c above 70 c. d. derate 14.9 mw/c above 70 c. notes: a. room = 25 c, full = as determined by the operating suffix. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. the algebraic convention whereby the most negative value is a minimum and the most po sitive a maximum, is used in this data sheet. d. guarantee by design, nor s ubjected to production test. e. v in = input voltage to perform proper function. f. guaranteed by 5 v leakage testing, not production tested. absolute maximum ratings parameter limit unit reference to gnd v+ - 0.3 to + 6 v in, com, nc, no a - 0.3 to (v+ + 0.3) continuous current (any terminal) 50 ma peak current (pulsed at 1 ms, 10 % duty cycle) 200 storage temperature (d suffix) - 65 to 150 c power dissipation (packages) b msop-10 c 320 mw dfn-10 d 1191 specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 %, v in = 0.5 or 1.4 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc , v com full 0 v+ v on-resistance r on v+ = 2.7 v, v com = 1.5 v i no/nc = 10 ma room full 3.2 4.5 5.0 r on flatness r on flatness v+ = 2.7 v, v com = 1.5, 2 v i no/nc = 10 ma room full 1.0 1.4 16 r on match between channels r on v+ = 2.7 v, v com = 1.5 v i no/nc = 10 ma room full 0.1 0.3 0.4 switch off leakage current f i no(off), i nc(off) v+ = 3.6 v, v no , v nc = 0.3 v/ 3 v v com = 3 v/0.3 v room full - 1 - 10 1 10 na i com(off) room full - 1 - 10 1 10 channel-on leakage current f i com(on) v+ = 3.6 v, v no, v nc = v com = 0.3 v/3 v room full - 1 - 10 1 10 digital control input high voltage d v inh full 1.4 v input low voltage v inl full 0.5 input capacitance c in full 4 pf input current i inl or i inh full 1 1 a dynamic characteristics tu r n - o n t i m e t on v+ = 2.7 v, v no or v nc = 1.5 v r l = 300 , c l = 35 pf room full 15 30 50 ns turn-off time t off room full 10 25 35 break-before-make time t d v no or v nc = 1.5 v, r l = 300 , c l = 35 pf full 1 charge injection d q inj c l = 1 nf, v gen = 1.5 v, r gen = 0 room 1 pc - 3 db bandwidth bw 0 dbm, c l = 5 pf, r l = 50 room 157 mhz off-isolation d oirr r l = 50 , c l = 5 pf f = 1 mhz room - 67 db f = 10 mhz room - 47 crosstalk d x ta l k r l = 50 , c l = 5 pf f = 1 mhz room - 67 f = 10 mhz room - 47 n o , n c off capacitance d c no(off) v in = 0 or v+, f = 1 mhz room 8 pf c nc(off) room 8 channel-on capacitance d c no(on) room 35 c nc(on) room 35 power supply power supply current i+ v in = 0 or v+ full 0.01 1.0 a
document number: 74333 s-61774-rev. a, 11-sep-06 www.vishay.com 3 vishay siliconix DG2517/dg2518 notes: a. room = 25 c, full = as determined by the operating suffix. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. guarantee by design, nor subjected to production test. e. v in = input voltage to perform proper function. f. guaranteed by 5 v leakage testing, not production tested. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indi cated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended per iods may affect device reliability. specifications (v+ = 5 v) parameter symbol test conditions otherwise unless specified v+ = 5 v, 10 %, v in = 0.8 or 2.0 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc , v com full 0 v+ v on-resistance r on v+ = 4.2 v, v com = 3.5 v, i no/nc = 10 ma room full 34.0 4.3 r on flatness r on flatness v+ = 4.2 v, v com = 1, 2, 3.5 v i no/nc = 10 ma room full 1.1 1.4 1.6 r on match between channels r on v+ = 4.2 v, v com = 3.5 v, i no/nc = 10 ma room full 0.1 0.3 0.4 switch off leakage current i no(off), i nc(off) v+ = 5.5 v v no , v nc = 1 v/4.5 v, v com = 4.5 v/1 v room full - 1 - 10 1 10 na i com(off) room full - 1 - 10 1 10 channel-on leakage current i com(on) v+ = 5.5 v, v com = v no , v nc = 1 v/4.5 v room full - 1 - 10 1 10 digital control input high voltage d v inh full 2.0 v input low voltage v inl full 0.8 input capacitance c in full 4 pf input current i inl or i inh v in = 0 v or v+ full 1 1 a dynamic characteristics tu r n - o n t i m e t on v+ = 4.2 v, v no or v nc = 3 v r l = 300 , c l = 35 pf room full 12 25 45 ns turn-off time t off room full 820 30 break-before-make time t d v no or v nc = 3 v, r l = 300 , c l = 35 pf full 1 charge injection d q inj c l = 1 nf, v gen = 2.5 v, r gen = 0 room 2 pc - 3 db bandwidth bw 0 dbm, c l = 5 pf, r l = 50 room 157 mhz off-isolation d oirr r l = 50 , c l = 5 pf f = 1 mhz room - 67 db f = 10 mhz room - 47 crosstalk d x ta l k r l = 50 , c l = 5 pf f = 1 mhz room - 67 f = 10 mhz room - 47 source-off capacitance d c no(off) v in = 0 or v+, f = 1 mhz room 8 pf c nc(off) room 8 channel-on capacitance d c no(on) room 35 c nc(on) room 35 power supply power supply range v+ 1.8 5.5 v power supply current i+ v in = 0 or v+ full 0.01 1.0 a
www.vishay.com 4 document number: 74333 s-61774-rev. a, 11-sep-06 vishay siliconix DG2517/dg2518 typical characteristics 25 c, unless noted r on vs. v com and supply voltage supply current vs. temperature leakage current vs. temperature 012 3 45 v com - an a log volt a ge (v) 0 1 2 3 4 5 6 7 8 9 10 v+ = 2.7 v v+ = 4.2 v v+ = 1. 8 v t = 25 c i no/nc = 10 ma ( ) e c n a t s i s e r - n o - r n o - 60 - 40 - 20 0 20 40 60 8 0 100 1 1000 10000 temper a t u re (c) v+ = 5 v v in = 0 v 10 100 ) a p ( t n e r r u c y l p p u s - + i - 40 - 15 10 3 5 60 8 5 1 1000 temper a t u re (c) 10 100 ) a p ( t n e r r u c e g a k a e l i no(off) , i nc(off) i com(off) i com(on) r on vs. analog voltage and temperature supply current vs. input switching frequency leakage vs. analog voltage 0 1 2 3 4 5 012 3 45 25 c v com - an a log volt a ge (v) 25 c ( ) e c n a t s i s e r - n o - r n o v+ = 2.7 v - 40 c v+ = 4.2 v - 40 c 8 5 c 8 5 c 10 10k 100k 10m 10 ma 1 ma 10 a 1 a 10 na inp u t s witching freq u ency (hz) ) a ( t n e r r u c y l p p u s - + i 1 na 100 na 100 a v+ = 5.5 v 100 1k 1m - 8 0 - 60 - 40 - 20 0 20 40 60 8 0 0.0 1.0 2.0 3 .0 4.0 5.0 v com , v no , v nc - an a log volt a ge (v) ) a p ( t n e r r u c e g a k a e l v+ = 5.5 v i nc(off) , i no(off) i com(off) i com(on)
document number: 74333 s-61774-rev. a, 11-sep-06 www.vishay.com 5 vishay siliconix DG2517/dg2518 typical characteristics 25 c, unless noted test circuits switching time vs. temperature switching threshold vs. supply voltage - 60 - 40 - 20 0 20 40 60 8 0 100 r l = 3 00 / t n o ( s ) e m i t g n i h c t i w s - t f f o temper a t u re (c) 0 2 4 6 8 10 12 14 16 1 8 t off , v+ = 2.7 v t on , v+ = 4.2 v t on , v+ = 2.7 v t off , v+ = 4.2 v v+ - su pply volt a ge (v) r h t g n i h c t i w s -) v ( d l o h s e v t 0 0.5 1 1.5 2 2.5 1.5 2 2.5 33 .5 4 4.5 5 insertion loss, off-isolation crosstalk vs. frequency charge injection vs. analog voltage 100k - 90 10m 0 - 8 0 - 60 100m 1g 1m freq u ency (hz) ) b d ( x , r r i o , s s o in s ertion l k l a t - 40 - 20 lo ss x talk - 70 - 50 - 3 0 - 10 v+ = 5 v r l = 50 oirr - 8 0 - 60 - 40 - 20 0 20 40 012 3 45 v com - an a log volt a ge (v) ) c p ( n o i t c e j n i e g r a h c q - v+ = 5 v v+ = 3 v figure 1. switching time s witch inp u t c l (incl u de s fixt u re a nd s tr a y c a p a cit a nce) v+ in no or nc c l 3 5 pf com logic inp u t r l 3 00 v out gnd v+ 50 % 0 v logic inp u t s witch o u tp u t t on t off logic ?1? = s witch on logic inp u t w a veform s inverted for s witche s th a t h a ve the oppo s ite logic s en s e. 0 v s witch o u tp u t v out v com r l r l r on 0.9 x v out t r < 5 n s t f < 5 n s v inh v inl
www.vishay.com 6 document number: 74333 s-61774-rev. a, 11-sep-06 vishay siliconix DG2517/dg2518 test circuits vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon tech- nology and package reliability represent a com posite of all qualified locations. for related documents such as package/tape dra wings, part marking, and reliability data, see http://www.vishay.com/ppg?74333 . figure 2. break-before-make interval c l (incl u de s fixt u re a nd s tr a y c a p a cit a nce) nc v no no v nc 0 v logic inp u t s witch o u tp u t v o v nc = v no t r < 5 n s t f < 5 n s 90 % t d t d in com v+ gnd v+ c l 3 5 pf v o r l 3 00 v inl v inh figure 3. charge injection off on on in v out v out q = v out x c l c l = 1 nf r gen v out com v in = 0 - v+ in v gen gnd v+ v+ in depend s on s witch config u r a tion: inp u t pol a rity determined b y s en s e of s witch. + nc or no figure 4. off-isolation in gnd nc or no 0 v, 2.0 v 10 nf com off i s ol a tion = 20 log v com v no nc r l an a lyzer v+ v+ com figure 5. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.0 v meter hp4192a imped a nce an a lyzer or eq u iv a lent 10 nf v+ v+
legal disclaimer notice vishay document number: 91000 www.vishay.com revision: 08-apr-05 1 notice specifications of the products displayed herein are subjec t to change without notice. vishay intertechnology, inc., or anyone on its behalf, assume s no responsibility or liability fo r any errors or inaccuracies. information contained herein is intended to provide a product description only. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in vishay's terms and conditions of sale for such products, vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and /or use of vishay products including liab ility or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyrigh t, or other intellectual property right. the products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify vishay for any damages resulting from such improper use or sale.
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